As processor speeds continue to increase, memory performance becomes more of a limiting factor in system performance and therefore, memory performance must increase as well. An important aspect of increasing memory performance is increasing the throughput of memory systems. Some memory devices, such as direct random access memory (DRAM) devices require periodic refreshing to prevent data loss. In order to perform a refresh, a memory device enters a refresh mode where the DRAM is not accessible until the refresh has completed execution.
Memory controllers issue refresh commands on a periodic basis so that the DRAM device is refreshed at least once in every predetermined refresh period. The length of the refresh period is dictated by the memory device specifications.
The DRAM typically is not accessible when it is executing the refresh command because typically the memory banks are refreshed at the same time, therefore no memory bank is available for normal access during the refresh period. The memory controller waits until the internal refresh operation has completed before resuming normal operation (e.g., before sending another command such as a read or write command). This period of time when the DRAM is not accessible is referred to as lockout time. Thus, as memory devices increase in size, the amount of time that the memory is locked out or inaccessible increases, affecting system performance.